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microprocessor supervisory circuit R5106N series no. ea-169-070711 1 outline the R5106N series are cmos-based con supervisory circuit, or high accuracy and ultra low supply current voltage detector with built-in delay and watchdog timer. when the supply voltage is down across the threshold, or the watchdog timer does not detect the system clock from the con, the reset output is generated. the voltage detector circuit is used for the system reset, etc. the detector threshold is fixed internally, and the tolerance is 1.0%. the released delay time (power-on reset delay) circuit is built-in, and output delay time is adjustable with an external capacitor. when the supply voltage becomes the released voltage, the reset state will be maintained during the delay time. the time out period of the watchdog timer can be also set with an external capacitor. the output type of the reset is selectable, nch open-drain, or cmos. there is a function to stop supervising clock by the watchdog timer (inh function). the package is small sot-23-6. features ? built-in a watchdog timer's time out period accuracy 30% ? timeout period for watchdog and generating a reset signal can be set by an external capacitor ? detector threshold voltage 0.1v stepwise setting in the range from 1.5v to 5.5v ? supply current typ. 11a ? operating voltage 0.9v to 6.0v ? high accuracy output voltage of detector threshold 1 .0% ? power-on reset delay time accuracy 20% ? power-on reset delay time of the voltage detector can be set with an external capacitor. ? small package sot-23-6 application ? supervisory circuit for equipment with using microprocessors.
R5106N 2 block diagrams R5106Nxx1a R5106Nxx1c ct gnd vdd sck reset b clock detector watchdog timer - + inh + - sw1 sw2 sw1: "l"= on, sw2 "h"= on ct gnd vdd sck reset b clock detector watchdog timer - + inh + - sw1 sw2 sw1 "l"= on, sw2 "h" on
R5106N 3 selection guide the selection can be made with designating the part number as shown below: R5106Nxx 1x-tr part number a b c d code descriptions a designation of package type; n: sot-23-6 (2.8mmx2.9mm) b designation of detector threshold voltage (-v det ) 0.1v stepwise setting is possible in the range from 1.5v to 5.5v c designation of the output type of resetb a: nch open-drain output c: cmos output d designation of taping type pin configuration pin description pin no symbol pin description 1 sck clock input pin from microprocessor 2 inh inhibit pin ("l": inhibit the watchdog timer) 3 v dd power supply pin 4 resetb output pin for reset signal of watchdog timer and voltage detector. (output ?l? at detecting detector threshold and watchdog timer reset.) 5 gnd ground pin 6 ct external capacitor pin for setting reset and watchdog timeout periods and delay time of voltage detector 1 2 3 6 5 4 sck inh ct resetb gnd vdd sot-23-6 R5106Nxxxa R5106Nxxxc
R5106N 4 absolute maximum ratings topt=25 c, v ss =0v symbol item rating unit v in supply voltage -0.3 7.0 v v ct voltage of c t pin -0.3 v in +0.3 v v resetb output voltage voltage of resetb pin -0.3 7.0 v v sck voltage of sck pin -0.3 7.0 v v inh input voltage voltage of inh pin -0.3 7.0 v i resetb output current current of resetb pin 20 ma p d power dissipation 250 mw topt operating temperature range -40 +105 c tstg storage temperature range -55 +125 c
R5106N 5 electrical characteristics R5106Nxxxa/c unless otherwise specified, v in =6.0v, c t =0.1uf, rpull-up=100k ? topt=25 c the number written in bold font is applied to the temperature range from -40 c to 105 c symbol item conditions min. typ. max. unit v in operating voltage 0.9 6.0 v iss supply current v in =(-v det )+0.5v clock pulse input 11 15 a voltage detector -v det detector threshold v in pin threshold x0.990 x0.972 x1.010 x1.015 v ? -v det / ? topt detector threshold temperature coefficient -40 c topt 105 c 100 ppm/ c v hys detector threshold hysteresis (-v det ) x0.03 (-v det ) x0.05 (-v det ) x0.07 v tp lh output delay time c t =0.1 f 340 370 467 ms i doutn output current (resetb output pin) nch, v dd =1.2v, v ds =0.1v 0.38 0.80 ma i doutp output current (resetb output pin) pch, v dd =6.0v, v ds =0.5v (R5106Nxxxc) 0.65 0.90 ma watchdog timer t wd watchdog timeout period c t =0.1uf 230 310 450 ms t wr reset hold time of wdt c t =0.1uf 29 34 48 ms v sckh sck input "h" v in x0.8 6.0 v v sckl sck input "l" 0.0 v in x0.2 v v inhh inh input "h" 1.0 6.0 v v inhl inh input "l" 0.00 0.35 v r inh inh pull-up resistance 60 110 164 k ? t sckw sck input pulse width v sckl =v in x0.2, v sckh =v in x0.8 500 ns the bold type values are guaranteed by design. typical applications power s upply r c ct sw R5106Nxxxa series gnd v dd resetb sck ct inh p v dd i/o reset
R5106N 6 test circuit supply current test circuit R5106Nxxxc series gnd v dd resetb sck ct inh power supply c ct sw p v dd i/o reset r(R5106Nxxxa) c ct gnd v dd resetb sck ct R5106Nxxxa/c series clock input a inh sw
R5106N 7 timing diagram (R5106Nxxxa/R5106Nxxxc) (nch open-drain, resetb pin is pulled up to vdd.) twd v dd ct sck vrefh vrefl n resetb tplh +v det (1) (2) (3) (4) (5) (6) twr -v det tphl tplh twdi
R5106N 8 operation when the power supply, v dd pin voltage becomes more than the released voltage (+v det ), after the released delay time (or the power on reset time tplh), the output of resetb becomes ?h? level. when the sck pulse is input, the watchdog timer is cleared, and ct pin mode changes from discharge mode to charge mode. when the ct pin voltage becomes higher than vrefh, the mode will change into discharge, and next watchdog time count starts. unless the sck pulse is input, wdt will not be cleared, and during the charging period of ct pin, resetb="l". when the v dd pin becomes lower than the detector threshold voltage, resetb outputs "l". if "l" signal is input to the inh pin, the resetb outputs "h", regardless the sck clock state. during the "l" period of inh pin, the voltage detector monitors the supply voltage. when the signal to the inh pin is set from "l" to "h", the watchdog starts supervising the system clock, or charge cycle to the ct pin starts, the capacitor connected to the ct pin is charged with the current of setting reset time of wdt ? watchdog timeout period/reset hold time the watchdog timeout period and reset hold time can be set with an external capacitor to ct pin. the next equations describe the relation between the watchdog timeout period and the external capacitor value, or the reset hold time and the external capacitor value. t wd(s) = 3.1*10 6 c (f) twr(s)=twd/9 the watchdog timer (wdt) timeout period is determined with the discharge time of the external capacitor. during the watchdog timeout period, if the clock pulse from the system is detected, wdt is cleared and the capacitor is charged. when the charge of the capacitor completes, another watchdog timeout period starts again. during the watchdog timeout period, if the clock pulse from the system is not detected, during the next reset hold time resetb pin outputs "l". after starting the watchdog timeout period, (just after from the discharge of the external capacitor) even if the clock pulse is input during the time period "twdi", the clock pulse is ignored. twdi[s]=twd/10 released delay time (power-on reset delay time) the released delay time can be set with an external capacitor connected to the ct pin. the next equation describes the relation between the capacitance value and the released delay time (tplh). tplh(s)=3.7 10 6 c(f) the capacitor connected to ct pin determines twd, twr, and tplh. minimum operating voltage (vinl) we specified the minimum operating voltage as the minimum input voltage in which the condition of resetb pin being 0.1v or lower than 0.1v. (herein, pull-up resistance is set as 100k ? in the case of the nch open-drain output type. inhibit (inh) function if inh pin is set at "l", the watchdog timer stops monitoring the clock, and the resetb output will be dominant by the voltage detector's operation. therefore, if the supply voltage is set at more than the detector threshold level, resetb outputs "h" regardless the clock pulse. inh pin is pulled up with a resistor (typ.110k ? ) internally.
R5106N 9 resetb output resetb pin's output type is selectable either the nch open-drain output or cmos output. if the nch open-drain type output is selected, the resetb pin is pulled up with an external resistor to an appropriate voltage source. clock pulse input built-in watchdog timer is cleared with the sck clock pulse within the watchdog timeout period. application notes if a resistor is connected to the vdd pin, the operation might be unstable with the supply current of ic itself. connection examples affected by the conduction current v in r5106 cmos output v dd r1 r2 resetb r5106 v dd v in r1 resetb r5106 vdd vin r1 resetb r2 tplh v dd ct resetb tphl tphl imperfect discharge perfect discharge -v det +vdet +vtct -vtct tplh1 power-on reset operation against input glitch tplh1 < tplh
R5106N 10 typical characteristics 1) supply current vs. input voltage 2) detector threshold vs. temperature r5 1 0xn 1 5 1 a/c, r5 1 0xg 1 5 1 a/c 0 2 4 6 8 1 0 1 2 1 4 1 6 1 8 20 0 1 23456 supply voltage [v] current iss [ua] 25 1 05 -50 r5 1 0xn30 1 a/c, r5 1 0xg30 1 a/a 0 2 4 6 8 1 0 1 2 1 4 1 6 1 8 20 0 1 23456 supply voltage [v] current iss [ua] 25 -50 1 05 r5 1 0xn 1 5 1 a/c, r5 1 0xg 1 5 1 a/c 1 . 4 7 0 1 . 480 1 . 4 9 0 1 . 500 1 . 5 1 0 1 . 520 1 . 530 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] d etect voltage [v] r5 1 0xn2 7 1 a/c, r5 1 0xg2 7 1 a/c 2 . 660 2 . 6 7 0 2 . 680 2 . 6 9 0 2 .7 00 2 .7 1 0 2 .7 20 2 .7 30 2 .7 40 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] d etect voltage [v] r5 1 0xn42 1 a/c r5 1 0xg42 1 a/c 4 . 1 20 4 . 1 40 4 . 1 60 4 . 1 80 4 . 200 4 . 220 4 . 240 4 . 260 4 . 280 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] d etect voltage [v]
R5106N 11 3) detector threshold hysteresis vs. temperature 4) nch driver output current vs. v ds topt=25 c r5 1 0xn 1 5 1 a/c r5 1 0xg 1 5 1 a/c 3 . 0 4 . 0 5 . 0 6 . 0 7. 0 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] h ysteresis [ % ] r5 1 0xn2 7 1 a/c r5 1 0xg2 7 1 a/c 3 . 0 4 . 0 5 . 0 6 . 0 7. 0 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] h ysteresis [ % ] r5 1 0xn42 1 a/c r5 1 0xg42 1 a/c 3 . 000 4 . 000 5 . 000 6 . 000 7. 000 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] h ysteresis [ % ] r5 1 0xn, r5 1 0xg 0 2 4 6 8 1 0 1 2 1 4 1 6 1 8 20 0 . 00 . 20 . 40 . 60 . 8 1 . 0 1 . 2 1 . 4 v d s [v] output current [ m a] vdd=1.0v vdd=6.0v vdd=5.0v vdd=4.0v vdd=3.0v vdd=2.0v vdd=1.5v
R5106N 12 5) nch driver output current vs. v dd 6) pch driver output current vs. v dd r5 1 0xn, r5 1 0xg 0 2 4 6 8 1 0 1 2 1 4 1 6 1 8 20 0 1 23456 supply voltage v dd [v] output current [ m a] v d s = 0 . 3v 1 05 25 t opt= -40 r5 1 0xn, r5 1 0xg 0 2 4 6 8 1 0 1 2 1 4 1 6 1 8 20 0 1 23456 supply voltage v dd [v] output current [ m a] vds=0.5v 105 25 topt=-40 r5 1 0xn, r5 1 0xg 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 1 . 8 2 . 0 0 1 23456 supply voltage [v] output current [ m a] v d s = 0 . 3v 1 05 25 -40 r5 1 0xn, r5 1 0xg 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 1 . 8 2 . 0 0 1 23456 supply voltage [v] output current [ m a] v d s = 0 . 5v 1 05 25 -40 r5 1 0xn, r5 1 0xg 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 1 . 8 2 . 0 0 1 23456 supply voltage [v] output current [ m a] v d s = 1 . 0v 1 05 25 -40
R5106N 13 7) released delay time vs. input voltage 8) released delay time vs. temperature 9) detector output delay time vs. temperature 10) wdt reset timer vs. temperature 11) wdt timeout period vs. temperature 12)wdt reset timer vs. input voltage r5 1 0xn, r5 1 0xg 300 320 340 360 380 400 420 440 460 480 500 0 1 23456 7 supply voltage [v] po w er on reset d elay tp l h [ m s] t opt= 25 r5 1 0xn, r5 1 0xg 300 320 340 360 380 400 420 440 460 480 500 -50 -25 0 25 50 7 5 1 00 1 25 1 50 te m perature [ ] po w er on reset d elay tp l h [ m s] v dd= 6v r510xn, r510xg 200 220 240 260 280 300 320 340 360 380 400 -50 -25 0 25 50 75 100 125 temperature [ ] timeout period [msec] r5 1 0xn, r5 1 0xg 30 32 34 36 38 40 42 44 46 48 50 1 23456 supply voltage [v] reset ti m e [ m s ec ] r5 1 0xn, r5 1 0xg 0 1 0 20 30 40 50 60 7 0 80 9 0 1 00 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] ti m e [us ec ] ( -v d et )+ 1 ( -v d et ) - 1 1 us input r5 1 0xn, r5 1 0xg 30 32 34 36 38 40 42 44 46 48 50 -50 -25 0 25 50 7 5 1 00 1 25 te m perature [ ] reset ti m e [ m s ec ]
R5106N 14 13) wdt timeout period vs. input voltage r510xn, r510xg 200 220 240 260 280 300 320 340 360 380 400 123456 supply voltage [v] timeout period [msec]

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